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Sensor data comes in various configurations and does not always match the desired memory order.
The de-serialized data needs to be rearranged and repacked on the fly to provide a compact stream for the memory writers.
- Implement remapping strategies for known sensors (CMV12000)
- Optimize for low gate count and high throughput
- Simulate/Test the re-mapper with test-streams
- Dual Memory know how
- HDL (VHDL or Verilog)
To get in touch with any mentor check the Mentor Contact List.
Notes: If you do not have access to the required hardware platforms/dev kits, we will provide them (or remote access) to you for the duration of the project.