4K HDMI output Gearwork Logic
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Description

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The AXIOM Beta will soon feature a Plugin with a Xilinx Artix FPGA with Gigabit Tranceivers to act as gearwork for the ZYNQ HDMI output.

Goals:

  • Implement gearwork and communication interface
  • Implement link training
  • Simulate/Test the interface and gearwork

Prerequisites:

  • HDMI Know-How
  • SERDES Know-How

Language Skills:

  • HDL (VHDL or Verilog)

Useful Links:

Mentors: Bertl

To get in touch with any mentor check the Mentor Contact List.

Notes: If you do not have access to the required hardware platforms/dev kits, we will provide them (or remote access) to you for the duration of the project.

Related Objects

sebastian created this task.Feb 8 2017, 4:04 PM
sebastian updated the task description. (Show Details)
sebastian raised the priority of this task from to Needs Triage.
sebastian moved this task to FPGA / HDL on the Google Summer of Code 2018 board.
sebastian added a subscriber: sebastian.
Bertl renamed this task from 4K HDMI output VHDL Logic / IP Core to 4K HDMI output HDL Gearwork Logic / IP Core.Feb 9 2017, 4:43 PM
Bertl updated the task description. (Show Details)
sebastian triaged this task as Normal priority.Feb 9 2017, 4:56 PM
Bertl updated the task description. (Show Details)Feb 9 2017, 5:23 PM
anil added a subscriber: anil.Mar 21 2017, 9:00 PM

Hi
I am Interested in this project.
Can you please elaborate on the project goals.
In the Goals, you mentioned Link training; are you referring to Link training, which is added in HDMI 2.1 spec?

Bertl added a subscriber: Bertl.Mar 23 2017, 9:14 AM
Bertl added a comment.Mar 23 2017, 9:19 AM

@anil: With Link Training we refer to training the LVDS connection required for the Gearwork.

The idea is to send high bandwidth data from the ZYNQ over the available LVDS channels to the FPGA on the Plugin.
To achieve maximum throughput (1-1.5Gbit/s for each LVDS pair), some kind of link training is required before actual data can be transmitted.

Hope that clarifies,
Herbert

Bertl updated the task description. (Show Details)Jan 23 2018, 12:34 PM
Bertl renamed this task from 4K HDMI output HDL Gearwork Logic / IP Core to 4K HDMI output HDL Gearwork Logic.
Bertl renamed this task from 4K HDMI output HDL Gearwork Logic to 4K HDMI output Gearwork Logic.Jan 23 2018, 1:06 PM
Bertl changed the edit policy from "All Users" to "Administrators".
malitha added a subscriber: malitha.Mar 4 2018, 5:49 PM

Hi,
I am from University of Peradeniya Sri Lanka. And I like to engage in the project. Can you please explain what is meant by " HDMI know-how " in the prerequsites section?

Thank you!

Bertl added a comment.Mar 4 2018, 7:46 PM

@malita With HDMI know-how we mean that you have a basic understanding how HDMI works, how the data is encoded and transported between source and sink and what the building blocks of an HDMI image are ... Tim does a nice overview of HDMI here https://media.ccc.de/v/33c3-8057-dissecting_hdmi

Hope this clarifies,
Herbert

Bertl updated the task description. (Show Details)Mar 4 2018, 7:49 PM
sebastian updated the task description. (Show Details)Mar 8 2018, 8:24 PM