To apply for this task please complete this mandatory coding challenge together with your application: T1228
Applications without matching coding challenge completed will not be considered.
Read our Google Summer of Code Overview page:
https://wiki.apertus.org/index.php/GSoC_Overview
We are currently in the process of rewriting gateware for the AXIOM cameras in Amaranth. (https://github.com/apertus-open-source-cinema/naps). Currently that effort only works on the AXIOM Micro but it would be beneficial if there was also support for running it on the AXIOM Beta.
During last years GSOC, work was started to support the CMV12000 sensor. The goal of this task is to finish this work.
Goals:
- Implement a sensor interface for the CMV12000 in nMigen
- Translate the existing pixel Remapper (which has a good architecture) from VHDL to nMigen
- Build a resolution loss decimation debayering method that downscales from 4K raw to Full HD color
- Build an "experiment" that implements a cmv12000 to HDMI flow
- Test everything on real hardware
- (Maybe optimize pieces of the current gateware so that they can catch up with the higher data-rate of the AXIOM Beta)
Prerequisites:
- HDL & FPGA understanding
Language Skills:
- Amaranth & Python
- VHDL (read & understand)
Useful Links:
- https://ams.com/cmv12000
- https://github.com/apertus-open-source-cinema/axiom-firmware/blob/master/peripherals/soc_main/pixel_remap.vhd
- https://github.com/apertus-open-source-cinema/naps
- https://github.com/apertus-open-source-cinema/naps/pulls?q=is%3Apr+author%3Atpwrules
Difficulty: Hard
Hours: Unless you have a lot of prior experience with FPGA design this will need 350hr. If you think you have enough experience to do this as a 175hr project please contact us about that beforehand.
Mentors: vup,anuejn
To get in touch with any mentor check the Mentor Contact List.
Notes: If you do not have access to the required hardware platforms/dev kits, we will provide them (or remote access) to you for the duration of the project.