Do you have any documentation about the UHS-III physical layer?
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Nov 5 2017
Oct 28 2017
Note that we are using Eagle 7.7.0 which is basically the last offline/old-license version before Autodesk took over.
Also note that our long term plan includes switching to KiCad which has made great progress since it gets the CERN treatment.
Jul 18 2017
27.9g for the footplate and 47.9g for the mountbase/skeleton.
May 23 2017
Is it possible to record in Uncompressed 4K 4:3 CinemaDNG internally?
Yes, but only for a short period, till the memory is full.
Apr 30 2017
Apr 2 2017
So, let's look into two example cases:
Sounds nice and should be doable on the MicroZed.
It might be worth using decimation and keeping the framerate to avoid extensive buffering.
The obvious drawback is that connectivity via ethernet is lost.
Still doesn't make any sense to me, as there never is any missing data for any channel.
Was this further investigated since?
Very likely, but I guess we have to simply test this on a real system.
Mar 29 2017
@mash: while that is a good idea for cutting/post software, this is not an option for the AXIOM Beta as there is no GPU to accelerate anything.
It is unlikely that the lens system manufacturers will disclose the information about their lenses, but of course, it is worth a try contacting and asking them.
Mar 24 2017
The implementation has to be done on both FPGAs (Xilinx ZYNQ and Lattice MachXO2).
As this is a FOSS/OH project, you have to limit the design to IP without restrictions on both sides.
Using platform specific primitives like DDR I/O, SerDes or FIFOs is not as problem, as long as they are variants to a generic entity (which can be adapted to a new platform with little to none effort).
Mar 23 2017
@kkvasan92: AXI is not required/desired for simulation/emulation.
@anil: With Link Training we refer to training the LVDS connection required for the Gearwork.
Yes, we have IRC, it is on #apertus @ irc.freenode.
Just join there and ask if you need anything.
@sagnikbasu: Sorry for the delay, I obviously missed your questions.
Mar 16 2017
Forgot to say, the fingers look great!!!!
It looks to me like the CI palette features a number of similar pastel colours, so that would work without changing the colour tone on the boards too much. E.g. secondary set, third colour (the red) and ternary set, the last two colours should be almost perfect for the MicroZed and OSHpark boards. The plugins could use the green from the secondary or ternary set, whatever looks better.
Mar 15 2017
Mar 12 2017
Bi-directional communication between ZYNQ and MachXO2 over a single LVDS pair (half duplex) in one case and over two LVDS pairs (full-duplex) in the other case.
Note that there is also a single ended clock line which can (and probably should :) be used for synchronization.
I don't think that this needs to be Vendor specific in any way.
I.e. you can use the Xilinx Vivado toolchain or any other (Altera Quartus, Lattice Diamond, ...) for testing and simulation, but the resulting HDL should be vendor independent.
Mar 3 2017
Here a few quick comments far from being complete:
Mar 2 2017
Ah, I just realized that the shields have more holes (4) than in reality (2) which needs to be corrected.
Yes, the grey version looks really nice, so if the color version had the same lightness (or maybe a tad bit brighter) it would be almost perfect :)
Still missing the labels for each part, but I guess that will be added later as a separate layer?
Mar 1 2017
Feb 23 2017
I liked the strong perspective of the PCB-Stack-Concept-V03-022 and the colorized black ink style very much.
This one looks to much like a preview rendering for a photorealistic model.
Feb 9 2017
Feb 8 2017
Dec 8 2016
It is still relevant, although it has somewhat progressed.
Sebastian and I are on IRC most of the time and we use it a lot in general, so I don't think a weekly IRC meeting would be a problem.
Still leaves the question of agenda and summary and probably finding good dates as well.
Also it will be additional work for somebody to organize and coordinate.
Oct 27 2016
Why not. After all, the IMU is currently 'solder-on' so we can try different ones without changing the entire design.
With a little trick (connecting the solder-on boards with small pins) they can also be easily swapped.
All that is required is a tiny PCB with the proper connections.
Other candidates are:
Oct 9 2016
Why stop there, why not 16K 600FPS ... :)
Do you have any open source stacks/designs for handling thunderbolt?
If so, please share with us.
The problem is simple:
- we have 12 LVDS lanes with up the 1.5Gbit of encoded data (officially 1.0Gbit per lane).
- SATA requires 3+ Gbit to be useful, i.e. we would need MGTs to handle that.
- UHS-II can be done with a cheap FPGA
Didn't know that BM decided to make the PCC FOSS/OH ...
We need to record metadata anyway, for example to keep information about exposure time, sensor register settings, etc.
If we decide to do it in a separate file/stream then we need very precise timestamps (or frame numbers) to go with.
Sounds nice! Do you happen to have a FOSS/OH solution for PCI-E 3.0 and M.2?
Sep 9 2016
Note that fairphone does not limit itself to "fair" components.
May 22 2016
All our plugin modules have an EEPROM on the I2C bus.
Recent Power Boards feature en EEPROM on the I2C bus as well.
The Main Board can be uniquely identified via PICs and MachXO2s.
The fact that the task is sitting there for a year now means that probably nobody is interested enough to work on it.
As you are very interested, maybe you could start working on the conversion.
We now think we know how UHS-II works and where the challenges are.
No hardware tests have been concluded so far because we still need to write software to utilize UHS-II.
May 21 2016
Actually (nitpicking here :) the IMU doesn't record the motion, it tracks it with several sensors.
May 15 2016
Specifically test/enable CEC and HPD as well as DDC
May 13 2016
While it certainly works well in post processing, this probably isn't a good idea for real-time stabilization in the AXIOM Beta.
Personally I have no problem with that.
Mar 15 2016
Dave Jones is an iconic figure.
You might not know him, and he is certainly not always right, but he is one of those internet phenomenons.
If we can find something better on the topic, it would be very welcome, if not, it is probably a lot better than nothing.
Mar 12 2016
Currently we have Eagle design files (switching to KiCAD is still on the roadmap), so we need to have some kind of auto conversion for now if we want to utilize KiCAD for the 3D export.
Feb 4 2016
Altera MAX 10 doesn't seem to be a good option as far as we checked.
Oct 29 2015
For any LCD/LED/eInk display that we want to consider, please first make sure that a datasheet is available and link it here, so that we can do some basic technical plausibility checks ...
Oct 17 2015
Sounds great, looking forward to it in anticipation!
Oct 15 2015
Well, personally I prefer a full width adaptive layout anytime over a fixed width layout.
Oct 14 2015
we also want sdcc and gputils (latest version) for pic related code and general tools like vim, gcc, python, etc for various tasks.
Sep 28 2015
But we definitely need a different video to show the process (if we want to) because it is ill advised to promote weapons in public :)
Sep 21 2015
Yes, interface board with FPGA is still on the roadmap :)
if we want to go for an eInk/ePaper dispay, we need to get a sample for testing.
HDMI Module and outline has been fixed (for the 1x HDMI module).
Aug 31 2015
Was mit einigem Aufwand moeglich waere ist eine Bounding Box um tPlace, bPlace zu legen (oder alternativ um die pads).
Unwahrscheinlich, da Komponenten quasi beliebige Gestalt haben koennen.
AFAIK, CFast is basically SATA, so something different :)
Aug 11 2015
I'd suggest to use at least five states (not started, started, good progress, almost finished and finished), otherwise most tasks will hang in the "in progress" state for a long time. Note that the "moon phase" concept and the color coding could be used as well.
Jul 11 2015
@sebastian: please check with Andon if they would do a two-part version (no connection between top and bottom block) - like the one we are investigating from Selwyn - and if, at what cost.
While it sounds appealing, I don't think we can have this one central place because there are a number of very different requirements to different types of data.
Jun 26 2015
Jun 8 2015
As sebastian explained, UHS-II is electrically different from "normal" SD, so the only way to make this work is through special hardware.
May 13 2015
What about simple roman numerals?
If there is a need to denote different parts/variants, add a letter, e.g.